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薩卡 / Mr. Aveek Sarkar

 

 

薩卡 / Mr. Aveek Sarkar

副總                 

VP, Sales and Support 

半導體事業部

Semiconductor BU, ANSYS Inc.

 Education:

  • M.S. EE, MBA

 Experiences:

  • VP, Sales, Support and Technology Evangelism, ANSYS Inc.

  • VP, Product Engineering and Support, Apache Design Solutions.

  • Sun Microsystems, National Semiconductors

 Biography:

TBD

 Speech Abstract:

 Managing the Complexities of Advanced 3D Packaging through Multiphysics Simulations

This talk will focus on simulation methodologies that are needed to enable emerging and advanced packaging technologies including Fan-out Wafer-level Packaging. Unique design techniques (like irregular vias) along with stringent requirements for power and signal integrity require accurate extraction and power/signal EM analysis which are not required on traditional packages for existing applications. With multiple dies integrated inside a wafer-level package, power/reliability analysis needs to consider the noise coupling from dies and package itself. Additionally multi-physics simulations targeting power-thermal-mechanical coupling have to considered as well. As the market expands beyond mobile into automotive and HPC applications, such converged Multiphysics simulation techniques will be required for design success.

 

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