With the once relentless pace of front-end lithography-driven advances in semiconductor technology and economics now stalling, advanced packaging techniques are beginning to pick up the gauntlet and lead the next wave of “More than Moore” advances in our industry. This shift, manifest in novel assembly process flows places a significant burden on assembly and test technology roadmaps. The new technology trend, such as fan-out wafer-level packaging used in iPhone7, 3D ICs and Through-Silicon-Vias (TSVs), requires new methodologies in packaging, assembling and testing. In this session, we will give you an overview of the current packaging test technology, what methods our customers are using today to improve the yield and reliability, and discuss future of the advanced packaging test and what test challenges our customers will face. You will also learn how FormFactor helps our customers design higher-performance devices with lower power consumption, and efficiently test such devices at the package level while reducing the overall test cost and time.