Mr. Manish Ranjan



Mr. Manish Ranjan

Managing Director for Advanced

Packaging Business Unit

Lam Research Corporation


  • MSc in Industrial Engineering, State University of New York

  • MBA, The Wharton School of Business in Philadelphia


  • Semiconductor  leader with twenty years of global experience that include demonstrated record of developing strategies that lead to market share, revenue, and profit growth. 

  • Deep technical expertise in semiconductor manufacturing trends, BEOL (back end of line), copper pillar, wafer level packaging (WLP) and 3D (fan out WLP, TSV) packaging technology.



Manish Ranjan is the Managing Director for Advanced Packaging Business Unit at Lam Research.  Prior to joining Lam Research, he was the Head of Advanced Packaging and Nanotechnology segment at Ultratech Inc.   In this role, he was responsible for managing all aspects of product, business and market development for lithography market segment.  He also worked at Lucent Technologies as the Product Technology Manager in the Analog Product Business Unit where he managed technical and business issues related to flip chip and WLP assembly.  Manish has received a Master of Science degree in Industrial Engineering from State University of New York at Binghamton. He has also received a Master of Business Administration from The Wharton School of Business in Philadelphia.



Growth in the semiconductor industry is now driven by consumers who demand superior performance along with a thin profile for leading edge devices. While improvements in semiconductor device performance is achieved with traditional front-end scaling technology, it is widely expected that packaging technology will play an important role for meeting the next-generation functionality and form factor requirements. IC packaging technology has evolved in a highly diverse manner over the past decade, addressing both high-end and low-end applications. Advanced packaging technology now plays a critical role in delivering the required form factor and improved electrical, thermal, and power consumption specifications for next-generation semiconductor devices. Recently developed packaging technologies such as high-density wafer-level fan-out (WLFO) and through-silicon via (TSV) have gained increased attention to meet performance and form factor requirements in the semiconductor market. This presentation will talk about the evolution of advanced packaging along with the future market outlook and key technology requirements.





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