林家輝 / Mr. Jeffrey CH Lin



林家輝 / Mr. Jeffrey CH Lin

Senior Division Director



  • MS in EECS, Northwestern University


  • MEMS & RF-SOI tech R&D (UMC)

  • CMOS Image Sensor tech R&D (UMC)

  • Non-Volatile Memory tech R&D (UMC)



  • The majority of memory fabrication has taken place on 300mm silicon wafers since 2008. And a similar transition from 200mm to 300mm has also occurred in Logic/MPU device production. With the migration of memory and logic production to 300mm, finding new applications for 200mm fab has become necessary. And MEMS is a good candidate because it employs semiconductor fabrication process while the technology scaling is not as demanding as memory and logic. However, there are different process and wafer handling requirements for MEMS in comparison with traditional IC fabrication, and different MEMS technologies and products require different processes. So technology and product selection becomes an important topic to be considered.





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