Mr. James E Lamb III



Mr. James E Lamb III

Deputy CTO / Corporate Technical Fellow

Advanced Semiconductor Manufacturing

Brewer Science, Inc.


  • BSc Chemical Eng. Missouri S&T, 1984


  • Deputy CTO - Adv. Semi Manf. June 2017

  • Corporate Technical Fellow 2015 –

  • Director of Carbon Electronics Center 2010-2014

  • Managing Director of Product Management  2008-2010

  • Patents 19, Technical Publications 28



  • For advanced lithography nodes, multi-patterning and pitch doubling/quadrupling are dominant methods to meet the scaling challenges with 193-nm immersion lithography.  Additionally, multilayer lithography stacks are needed to manage pattern aspect ratio  and etch transfer for the device structures. These techniques have allowed scaling  down to the 7-nm node, but at the same time greatly increase the number of process  steps and material sets, leading to escalating cost. As process margins for  lithography and etch transfer shrink, hyper-tuning of materials and processes is  required. At 10-nm and 7-nm nodes, the quadruple pitch can not meet the patterning  needs, paving the way for EUV and DSA. With EUV, the potential for cost reduction  by eliminating many of the multi-patterning lithography steps is progressing toward  manufacturing readiness. As DSA matures, it can provide a lower-cost version of the  pitch multiplication for use with both EUV and pitch-multiplied 193i lithography. As a  material supplier for 10-nm and 7-nm nodes, reducing defects takes on a whole  different level of meaning; oligomers, small molecules, and ionic clusters now may  become major defect modes. Extreme levels of purification and fingerprinting of raw  materials, in-process intermediates, and the final products is needed to achieve the  required defect levels for these new nodes. This presentation will cover the impact of  the scaling challenges from the perspective of material provider and critical impact on  product development and quality manufacturing for 10-nm and 7-nm materials.





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