•Materials are the key enabler in the advancement of semiconductor technology nodes, and recently, the industry is seeing a strong acceleration in the role of materials in the semiconductor space.
•To meet the ever-increasing demand for high density memory and high-speed computing, significant innovation is required in device architecture and the materials used to make these devices. The emergence of vertical scaling requires new materials with higher performance and higher levels of purity than ever before. The integration of such materials into the chip fabrication increases process complexity and makes yield ramps more challenging. With more process steps in the overall device build, speed to yield is critical.
•In practice, when introducing or integrating new materials in advanced processes, unexpected complex interactions between materials and micro contamination sources in the environment or other materials are usually blamed for the delay in yield ramps. Moreover, such interactions may become more enhanced in advanced processes as the devices continue to scale down, the materials become more diversified and the architectures evolve into 3D. These new challenges have called for the need to co-optimize new materials and micro contamination solutions in the advanced processes.
•This presentation will highlight some challenges in co-optimizing new materials and micro contamination solutions, and the opportunity of combining new materials with defect control to enable better devices at better yield and reliability.