Beyond Silicon: AI-Powered Co-Optimization for the Era of Advanced Packaging

10:15 am - 10:40 am

Innovation is increasingly shifting beyond the die toward advanced packaging, heterogeneous integration, chiplets, and system-level architectures. The challenge facing the semiconductor industry is no longer optimizing individual components, but co-optimizing silicon, package, PCB, power delivery, and thermal behavior as a unified system. This address explores how AI is transforming semiconductor engineering by enabling intelligent, multiphysics-aware design workflows. By combining large-scale simulation, accelerated computing, and agent-based engineering systems, designers can evaluate complex tradeoffs earlier, explore vastly larger design spaces, and accelerate convergence on optimal solutions. The discussion will examine how AI is helping bridge traditionally disconnected engineering domains and why system-level co-optimization will become essential for the next generation of AI infrastructure, high-performance computing, and advanced electronic systems.

Key Technologies Covered

Agentic AI in IC Design
EDA
Chiplet

Featured Speakers

Dr. Charles Alpert

AI Fellow, Cadence Design Systems

Charles (Chuck) Alpert is Cadence’s AI Fellow and drives cross-functional Agentic AI solutions throughout Cadence’s software stack. Prior to this, has lead various pioneering teams in digital implementation, including Global Routing, Clock Tree Synthesis, Genus Synthesis, and Cerebrus AI. Charles has published over 100 papers and received over 100 patents in the EDA space. He is a Cadence Master inventor. He has served as Deputy-Editor-in-Chief for IEEE Transactions on Computer-Aided Design, chaired the IEEE/ACM Design Automation Conference, and earned IEEE Fellow. He received a B.S. and B.A. Degree from Stanford University and a Ph.D. in Computer Science from UCLA.