Skip to main content

Advancing TFLN and InP Silicon Photonics Hybridization to Enable Next-Generation High-Speed Modulators

2:20 pm - 2:45 pm

As global data centers rapidly transition to meet the exponential demands of artificial intelligence and high-performance computing, the underlying optical infrastructure must scale accordingly. This talk explores the evolution of optical interconnects, beginning with a baseline review of Silicon-on-Insulator (SOI) market footprint and its critical role in powering scale-up and scale-out networking topologies. We will examine how key substrate features enable Co-Packaged Optics (CPO) and Optical I/O (OIO), optimizing both Microring Modulators (MRMs) and advanced 3D integration architectures. However, scaling to 400G per lane faces severe physical and materials-based limitations for traditional silicon photonics (SiPh). To overcome these bottlenecks, the industry is looking toward heterogeneous integration of advanced material platforms. This talk will delve into Soitec’s strategic offering and readiness in Thin-Film Lithium Niobate (TFLN) and Indium Phosphide (InP) substrates, highlighting emerging hybrid implementations and ecosystem partnerships. Finally, we will expand upon the potential of LNOI (Lithium Niobate on Insulator) and InP for standalone Photonic Integrated Circuits (PICs), demonstrating how Soitec is uniquely positioned to adapt its substrate portfolio to power these next-generation, ultra-high-speed, and power-efficient optical modulators.

 

Key Technologies Covered

  • Recap on SOI market footprint, how it powers scale-out networking with 1.6T and below pluggable. 
  • Focus on CPO and OIO, explaining why uniformity and the denuded zone are key features of SOI substrates for MRM and 3D integration. 
  • Set the problem statement : 400G/lane on SiPh ? Explain the limitations - the need for new materials : TFLN and InP as strong candidates. 
  • Elaborate on TFLN & InP and the Soitec's offering : Hint towards actual hybrid implementation 
  • Expand towards LNOI and InP used for stand-alone PIC, and how Soitec can adapt to enable such implementation

Featured Speakers

Mr. Yannick Larvor

Mr. Yannick Larvor

Head of Photonics & Sensing Segment Marketing, Soitec

Yannick Larvor serves as the Head of Photonics & Sensing Segment Marketing at SOITEC, where he drives strategic market positioning and commercialization roadmaps for next-generation SOITEC substrate technologies. Prior to joining SOITEC in 2023, Yannick accumulated over 25 years of cross-functional leadership roles in the semiconductor/optics ecosystem, including application engineering, product management, and global segment marketing for industry leaders such as STMicroelectronics, Infineon, and ams-OSRAM.
A recognized expert in aligning technological innovation with market demand, Yannick holds a Master of Science in Electrical Engineering from CentraleSupélec, France.