How COUPE Redefines AI Interconnects

9:35 am - 10:00 am

Driven by agentic AI, global AI token usage is projected to grow 24-fold by 2030. However, while AI compute power triples every two years, IO performance only increases by 1.4 times. This gap has created a performance bottleneck known as the "IO Wall." To overcome the limitations of traditional copper wires in high-frequency, long-distance transmission, transitioning to optical transmission is essential. COUPE (Compact Universal Photonic Engine) is TSMC’s advanced optical platform. It leverages SoIC-bonding to integrate an Electronic Integrated Circuit (EIC) and a Photonic Integrated Circuit (PIC) together, featuring an optimized optical path design (including silicon micro-lenses and copper Backside Metal Reflectors). To accelerate customers' time-to-market, TSMC provides a comprehensive Process Design Kit (PDK) containing essential silicon photonics components.

COUPE scales bandwidth using two distinct strategies: “Fast and Narrow” and "Slow and Wide".

Looking forward, TSMC is targeting heterogeneous integration, placing modulators, SOAs, and light sources directly onto the backside of the COUPE platform. COUPE can also serve as an optical interposer supporting up to 3.3x reticle size.

In conclusion, optical IO is a vital solution for AI and HPC. TSMC will continue to refine the COUPE platform for CWDM/DWDM applications and collaborate closely with stakeholders through System-Technology Co-Optimization (STCO) to integrate COUPE with CoWoS platform.

Key Technologies Covered

COUPE
SoIC-Bond
CPO-MCM and CPO-OOI
COUPE Heterogeneous Integration with TFLN, SOA and Light source

Featured Speakers

Mr. Ming Fa Chen

Deputy Program Director, TSMC

With a 30-year tenure at TSMC, I have consistently driven technical value through relentless innovation, amassing a portfolio of over 440 US patents. In the field of advanced packaging, I have led the development of numerous industry-leading technologies, including 12µm/5µm/2µm TSVs and fingerprint sensor chips, as well as key innovations such as CoWoS-S, SoIC, and COUPE—all of which now serve as the foundation of TSMC’s 3DFabric™ platform. Currently, I lead the Photonics Packaging Integration department, where I am dedicated to delivering cutting-edge optoelectronic solutions for next-generation HPC and AI.