Prospect of Flash Memory Devices in the AI Era

4:00 pm - 4:20 pm

In this presentation, I will introduce the current status and future prospect of Flash memory devices, including NAND and NOR Flash memories. Both NAND and NOR technologies have evolved into 3D architectures and will continue to deliver higher memory capacities in a single die. For NAND Flash, beyond its traditional roles in storage devices such as eMMC, UFS, and SSDs, it is poised to complement DRAM in generative AI applications, such as key/value cache offloading. High-IOPS SSDs utilizing fast NAND will play a critical role in vector search and predictive AI workloads. Meeting diverse requirements—including high bandwidth, low latency, high IOPS, and endurance—new SSD designs will demand advanced engineering techniques. In the case of NOR Flash, besides the conventional SPI NOR used for system boot codes, the technology is advancing toward higher bandwidth and 3D NOR architectures. Lastly, cutting-edge 3D IC packaging methods and copper hybrid bonding techniques are enabling innovative design approaches that enhance performance and enable efficient integration with CMOS technologies.

Key Technologies Covered

NAND and NOR Flash
High-Bandwidth, High IOPS, High Endurance SSD’s
3D NOR
Flash memory Chiplets

Featured Speakers

Dr. (Oliver) Hang-Ting Lue

Director, Macronix International Co., Ltd.

(Oliver) Hang-Ting Lue is currently the Director of Emerging Memory Technology R&D Division in Macronix. His research covers various topics including charge-trapping memories and 3D memories (3D NAND, 3D NOR, 3D DRAM, etc..). He has authored > 160 IEEE papers and >180 US granted patents, with more than 60 papers in IEDM and VLSI in the past 25 years. He has provided numerous short courses and invited papers in IEDM and VLSI, too. He is an IEEE Follow. He has served in IEDM committee (2010-2011, MT), and now is VLSI JFE committee (2011~now).