Distribution of Test in the Age of AI

上午 10:05 - 上午 10:30

As artificial intelligence (AI) accelerators rapidly evolve, so do the complexities and demands placed on Automatic Test Equipment (ATE) used to validate their performance, reliability, and functionality. This presentation explores the technical advancements required in ATE systems to meet the stringent demands of testing modern and future AI chips—characterized by massive parallelism, high-speed I/O, advanced packaging, and power management challenges. Key ATE capabilities, such as high channel density, scalable power delivery, data bandwidth, and integrated analytics, are essential to ensuring these devices are tested thoroughly, quickly, and cost-effectively.

Beyond the capabilities of the test equipment itself, the paradigm of test distribution is undergoing a critical transformation. Traditional test insertions—wafer sort, burn-in, final test, and system-level test (SLT)—must be re-optimized to handle the complexity and cost constraints associated with AI devices. This talk discusses how intelligent test content allocation across these insertions can drive both yield and quality, while minimizing the overall cost of test.

Key Technologies Covered

High-Density, Scalable ATE Architectures
Advanced Power Delivery Systems
High-Speed I/O Test Capabilities
Test Content Distribution and Insertion Optimization
Advanced Loadboard and Interface Hardware Design
Test Software Orchestration and Content Portability
AI-Driven Test Analytics

Featured Speakers

Mr. Fabio Pizza

Business Segment Manager, Advantest Europe

Fabio Pizza is a Business Segment Manager at Advantest Europe, within the V93000 Product Unit Marketing organization. Based in the Advantest Italy office, he is responsible for developing and executing strategies to protect and grow the V93000 market share in the Performance Digital segment — including HPC/AI, Mobile & Automotive Application Processors and ADAS. In his role, Fabio drives the definition of competitive solutions and product roadmaps aligned with customer requirements for performance, cost of test, and innovation.
He holds a Master’s degree in Electronics Engineering from “Politecnico di Milano” (Italy) and brings over 25 years of experience in the semiconductor industry.